FPGA implementation of a chaotic attractor based on the structure with negative resistance using a modified ANISHCHENKO-ASTAKHOV model

Authors

  • O.V. Osadchuk Vinnytsia National Technical University
  • I.O. Osadchuk Vinnytsia National Technical University
  • V.K. Skoschuk Vinnytsia National Technical University
  • V.I. Petrenko Vinnytsia National Technical University
  • K.V. Shikun Vinnytsia National Technical University

DOI:

https://doi.org/10.31649/1681-7893-2025-50-2-311-321

Keywords:

FPGA, chaotic attractor, negative differential resistance, modified Anishchenko-Astakhov model, Verilog, Euler method

Abstract

The article presents a simple and reproducible hardware implementation of a chaotic attractor based on a structure with negative resistance implemented using a modified Anishchenko–Astakhov model on an FPGA with single-cycle integration by the Euler method. At the preparation stage, Python modeling was performed to select parameters and an integration step that ensure a stable chaotic regime. Nonlinearities of the model of a chaotic attractor based on a structure with negative resistance were hardware-accounted for. The system clock of 50 MHz is divided into working 5 MHz, which corresponds to the long critical path of the combinatorial circuit and simplifies timing-closure for educational and demonstration purposes. Comparison of hardware samples with the reference software model confirmed characteristic phase portraits, stable update latency, and preservation of chaotic properties at the declared frequencies. The proposed architecture serves as a “baseline” for further acceleration: partial pipeline of individual operations, increasing bit depth and transition to higher-order methods, as well as for integration with real-time data acquisition interfaces.

Author Biographies

O.V. Osadchuk, Vinnytsia National Technical University

 доктор технічних наук, професор, завідувач кафедри інформаційних радіоелектронних технологій і систем

I.O. Osadchuk, Vinnytsia National Technical University

доктор технічних наук, доцент, доцент кафедри інформаційних радіоелектронних технологій і систем

V.K. Skoschuk, Vinnytsia National Technical University

аспірант кафедри інформаційних радіоелектронних технологій і систем

V.I. Petrenko, Vinnytsia National Technical University

аспірант кафедри інформаційних радіоелектронних технологій і систем

K.V. Shikun, Vinnytsia National Technical University

аспірант кафедри інформаційних радіоелектронних технологій і систем

References

Migwi, D.; Romaniuk, R.S. Lightweight and Scalable Security for Wireless IoT Systems: Challenges and Research Directions. Int. J. Electron. Telecommun. 2025, 71, 1–8.

Ullah, S.; Radzi, R.Z.; Yazdani, T.M.; Alshehri, A.; Khan, I. Types of Lightweight Cryptographies in Current Developments for Resource Constrained Machine Type Communication Devices: Challenges and Opportunities. IEEE Access 2022, 10, 35589–35604.

Babajans, R.; Cirjulina, D.; Kolosovs, D. Field-Programmable Gate Array-Based Chaos Oscillator Implementation for Analog–Discrete and Discrete–Analog Chaotic Synchronization Applications. Entropy 2025, 27, 334. https://doi.org/10.3390/e27040334

Kennedy, M. Chaos in the Colpitts oscillator. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 1994, 41, 771–774.

Hussain F., Hussain R., Hassan S.A., Hossain E. Machine Learning in IoT Security: Current Solutions and Future Challenges. IEEE Commun. Surv. Tutorials 2020, 22, 1686–1721.

Fu, Y.; Yu, Q.; Li, H. Design of a Differential Chaotic Shift Keying Communication System Based on Noise Reduction with Orthogonal Double Bit Rate. Appl. Sci. 2024, 14, 10723. https://doi.org/10.3390/app142210723

Ma, X., Lin, F. & Yao, B. Fast parallel algorithm for slicing STL based on pipeline. Chin. J. Mech. Eng. 29, 549–555 (2016). https://doi.org/10.3901/CJME.2016.0309.028

Orlandić M, Fjeldtvedt J, Johansen TA. A Parallel FPGA Implementation of the CCSDS-123 Compression Algorithm. Remote Sensing. 2019; 11(6):673. https://doi.org/10.3390/rs11060673

Capligins F, Litvinenko A, Kolosovs D, Terauds M, Zeltins M, Pikulins D. FPGA-Based Antipodal Chaotic Shift Keying Communication System. Electronics. 2022; 11(12):1870. https://doi.org/10.3390/electronics11121870

Çiçek, S.; Kocamaz, U.E.; Uyaroğlu, Y. Secure Chaotic Communication with Jerk Chaotic System Using Sliding Mode Control Method and Its Real Circuit Implementation. Iran. J. Sci. Technol. Trans. Electr. Eng. 2019, 43, 687–698.

Elsayed G. F. N. et al., FPGA design and implementation for adaptive digital chaotic key generator, Bull. Nat. Res. Centre, 47(1):122, 2023. DOI: https:’//doi.org/10.1186/s42269-023-01096-9

Beshaj L. et al., From Chaos to Security: A Comparative Study of Lorenz and Rössler Systems in Cryptography, Cryptography, 7(4):58, 2023. DOI: https://doi.org/10.3390/cryptography7040058

Choi, S.; Yang, H.; Noh, Y.; Kim, G.; Kwon, E.; Yoo, H. FPGA-Based Multi-Channel Real-Time Data Acquisition System. Electronics 2024, 13, 2950. https://doi.org/10.3390/electronics13152950

Muthuswamy, B.; Banerjee, S. A Route to Chaos Using FPGAs; Springer International Publishing: Cham, Switzerland, 2015; Volume 16, ISBN 978-3-319-18104-2.

Damaj I, Zaher A, Lawand W (2024) Optimizing FPGA implementation of high-precision chaotic systems for improved performance. PLoS ONE 19(4): e0299021. https://doi.org/10.1371/journal.pone.0299021

Semenov, A. Osadchuk, O. Semenova, O. Baraban, S. Voznyak, O. Rudyk, A. Koval, K. (2021). Research of Dynamic Processes in the Deterministic Chaos Oscillator Based on the Colpitts Scheme and Optimization of Its Self-oscillatory System Parameters. In: Radivilova, T., Ageyev, D., Kryvinska, N. (eds) Data-Centric Business and Applications. Lecture Notes on Data Engineering and Communications Technologies, vol 48. Springer, Cham. https://doi.org/10.1007/978-3-030-43070-2_10

Semenov, A. Semenova, O. Osadchuk, O. Osadchuk, I. Baraban, S. Koval, K. Baraban, M. (2021). Pulse and Multifrequency Van der Pol Generators Based on Transistor Structures with Negative Differential Resistance for Infocommunication System Facilities. In: Ageyev, D., Radivilova, T., Kryvinska, N. (eds) Data-Centric Business and Applications. Lecture Notes on Data Engineering and Communications Technologies, vol 69. Springer, Cham. https://doi.org/10.1007/978-3-030-71892-3_6

Osadchuk O.V., Osadchuk I.O., Skoshchuk V.K., Petrenko V.I. Deterministic chaos generator based on a bipolar field-effect transistor structure with negative differential resistance. Measuring and computing equipment in technological processes. 2025, No. 2. –P.240-249. https://doi.org/10.31891/2219-9365-2025-82-33

Downloads

Abstract views: 0

Published

2026-01-12

How to Cite

[1]
O. Osadchuk, I. Osadchuk, V. Skoschuk, V. Petrenko, and K. Shikun, “FPGA implementation of a chaotic attractor based on the structure with negative resistance using a modified ANISHCHENKO-ASTAKHOV model”, Опт-ел. інф-енерг. техн., vol. 50, no. 2, pp. 311–321, Jan. 2026.

Issue

Section

Optical-Electronic Devices and Components in Laser and Energy Technologies

Metrics

Downloads

Download data is not yet available.